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                       CALL FOR PARTICIPATION

                              CASES 2002
                     International Conference on
     Compilers, Architectures and Synthesis for Embedded Systems

          http://www.crest.gatech.edu/conferences/cases2002

                          October 8-11, 2002
                           Grenoble, France

                co-located with EMSOFT 2002 (Oct 7-9)
                     http://www-emsoft02.imag.fr/

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REGISTRATION DATES

    Registration:  $450
    Student:       $275
    If already registered for EMSOFT: $200
    Tutorial:      $150 (1 Tutorial) / $200 (2 Tutorials)

    Please register through the web site.

CONFERENCE PROGRAM and more...

    ... see web site.

TUTORIAL ABSTRACTS

Tutorial 1: Compilers for Embedded Processors: Technology and New Challenges

Tuesday, 8:30AM - 12Noon

Presenter: Rainer Leupers, Aachen University of Technology

Abstract: Programmable processors are among the major building blocks
in today's embedded SoC designs. In contrast to desktop systems, there
is a huge variety of domain specific and even application specific
architectures, including microcontrollers, DSPs, NPUs, and ASIPs.  The
irregular architectures and very high code quality demands of embedded
processors create a need for new compiler techniques beyond classical
Dragon Book compilation. This tutorial gives an overview of today's
retargetable compiler and code optimization technology for embedded
processors, while also touching further important software development
tools.  Additionally, new research challenges in the areas of
architecture exploration and compilation for recent architecture
families like VLIWs and NPUs will be covered.

Tutorial 2: Software Performance Analysis for Real-Time Embedded Systems

Tuesday, 1:30PM - 5PM

Presenters: Rolf Ernst, Technical University of Braunschweig
            Reinhard Wilhelm, University of Saarbrę-”³cken        

Abstract: Run-time guarantees play an important role in the area of
embedded systems and especially hard real-time systems. These systems
are typically subject to stringent timing constraints which often
result from the interaction with the surrounding physical
environment. It is essential that the computations are completed
within their associated time bounds; otherwise severe damages may
result. Therefore, a schedulability analysis has to be performed which
guarantees that all timing constraints will be met (also called timing
validation).  The complex processor architectural features, such as
caches and pipelines make the analysis of the software execution
behavior very difficult.  In this tutorial, the approaches for
computing reliable worst-case execution times for real-time software
will be presented. Techniques for analyzing the overall system-level
time behavior will also be discussed.